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meson.eclass: include riscv bitness in cpu_family

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This makes cpu_family identify RISC-V systems as either "riscv64"
or "riscv32" to match the given tuple, or it will leave it as
"riscv" when the tuple has an unknown cpu field.

This fixes the expected values of cpu_family in meson projects:
https://mesonbuild.com/Reference-tables.html#cpu-families

Signed-off-by: David Michael <fedora.dm0@gmail.com>
Signed-off-by: Mike Gilbert <floppym@gentoo.org>
This commit is contained in:
David Michael
2021-05-03 08:56:19 -04:00
committed by Mike Gilbert
parent 199863ce36
commit 9745b8f754
1 changed files with 6 additions and 1 deletions
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eclass/meson.eclass
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@@ -1,4 +1,4 @@
# Copyright 2017-2020 Gentoo Authors
# Copyright 2017-2021 Gentoo Authors
# Distributed under the terms of the GNU General Public License v2
# @ECLASS: meson.eclass
@@ -142,6 +142,11 @@ _meson_get_machine_info() {
case ${cpu_family} in
amd64) cpu_family=x86_64 ;;
arm64) cpu_family=aarch64 ;;
riscv)
case ${tuple} in
riscv32*) cpu_family=riscv32 ;;
riscv64*) cpu_family=riscv64 ;;
esac ;;
esac
# This may require adjustment based on CFLAGS