sys-devel/gcc: fix ext-dce thinko

Bug: https://gcc.gnu.org/PR120795
Closes: https://bugs.gentoo.org/958958
Signed-off-by: Sam James <sam@gentoo.org>

sys-devel/gcc/files/gcc-16.0.0_p20250622-ext-dce.patch

@@ -0,0 +1,41 @@
+https://gcc.gnu.org/PR120795
+https://gcc.gnu.org/cgit/gcc/commit/?id=cdd678544fefc313cb1c9da0327158d3ed355f62
+
+From cdd678544fefc313cb1c9da0327158d3ed355f62 Mon Sep 17 00:00:00 2001
+From: Sam James <sam@gentoo.org>
+Date: Mon, 23 Jun 2025 23:28:01 +0100
+Subject: Fixup dropping REG_EQUAL note in ext-dce
+
+Followup to r16-1613-g34e1e5e33ec3eb. remove_reg_equal_equiv_notes's
+2nd argument is 'no_rescan' which we accidentally had on, tripping
+an assert in combine or ira because we hadn't left things in a consistent
+state.
+
+Fix the thinko by enabling rescanning.
+
+gcc/ChangeLog:
+	PR rtl-optimization/120795
+
+	* ext-dce.cc (ext_dce_try_optimize_insn): Enable rescan in
+	remove_reg_equal_equiv_notes call.
+
+Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
+---
+ gcc/ext-dce.cc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/gcc/ext-dce.cc b/gcc/ext-dce.cc
+index b1d5ee4b36c4..df17b018bf1f 100644
+--- a/gcc/ext-dce.cc
++++ b/gcc/ext-dce.cc
+@@ -446,7 +446,7 @@ ext_dce_try_optimize_insn (rtx_insn *insn, rtx set)
+       /* INSN may have a REG_EQUAL note indicating that the value was
+ 	 sign or zero extended.  That note is no longer valid since we've
+ 	 just removed the extension.  Just wipe the notes.  */
+-      remove_reg_equal_equiv_notes (insn, true);
++      remove_reg_equal_equiv_notes (insn, false);
+     }
+   else
+     {
+-- 
+cgit

sys-devel/gcc/gcc-16.0.0_p20250622-r1.ebuild

@@ -0,0 +1,57 @@
+# Copyright 1999-2025 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+# Maintenance notes and explanations of GCC handling are on the wiki:
+# https://wiki.gentoo.org/wiki/Project:Toolchain/sys-devel/gcc
+
+TOOLCHAIN_PATCH_DEV="sam"
+TOOLCHAIN_HAS_TESTS=1
+PATCH_GCC_VER="16.0.0"
+PATCH_VER="3"
+MUSL_VER="1"
+MUSL_GCC_VER="16.0.0"
+PYTHON_COMPAT=( python3_{10..14} )
+
+if [[ -n ${TOOLCHAIN_GCC_RC} ]] ; then
+	# Cheesy hack for RCs
+	MY_PV=$(ver_cut 1).$((($(ver_cut 2) + 1))).$((($(ver_cut 3) - 1)))-RC-$(ver_cut 5)
+	MY_P=${PN}-${MY_PV}
+	GCC_TARBALL_SRC_URI="mirror://gcc/snapshots/${MY_PV}/${MY_P}.tar.xz"
+	TOOLCHAIN_SET_S=no
+	S="${WORKDIR}"/${MY_P}
+fi
+
+inherit toolchain
+
+if tc_is_live ; then
+	# Needs to be after inherit (for now?), bug #830908
+	EGIT_BRANCH=master
+elif [[ -z ${TOOLCHAIN_USE_GIT_PATCHES} ]] ; then
+	# Don't keyword live ebuilds
+	#KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~loong ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
+	:;
+fi
+
+if [[ ${CATEGORY} != cross-* ]] ; then
+	# Technically only if USE=hardened *too* right now, but no point in complicating it further.
+	# If GCC is enabling CET by default, we need glibc to be built with support for it.
+	# bug #830454
+	RDEPEND="elibc_glibc? ( sys-libs/glibc[cet(-)?] )"
+	DEPEND="${RDEPEND}"
+fi
+
+src_prepare() {
+	local p upstreamed_patches=(
+		# add them here
+	)
+	for p in "${upstreamed_patches[@]}"; do
+		rm -v "${WORKDIR}/patch/${p}" || die
+	done
+
+	toolchain_src_prepare
+	eapply "${FILESDIR}"/${PN}-13-fix-cross-fixincludes.patch
+	eapply "${FILESDIR}"/${P}-ext-dce.patch
+	eapply_user
+}