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dev-util/Tensile: fix compilation of sci-libs/rocBLAS on gfx906
Clang-20 disallowed op_sel in some VOP3P dot instructions. See: https://github.com/llvm/llvm-project/pull/100485 As ROCm maintains a fork of Clang, these changes did not reach official ROCm releases. However Gentoo uses original Clang-20, which has these incompatible changes. Luckilly, in Tensile these op_sel do nothing. Generally, they allow to shuffle vector elements before multiplication, but with values 0,0/1,1 shuffling is disabled and op_sel can be removed. Closes: https://bugs.gentoo.org/949817 Signed-off-by: Sv. Lockal <lockalsash@gmail.com> Part-of: https://github.com/gentoo/gentoo/pull/42887 Closes: https://github.com/gentoo/gentoo/pull/42887 Signed-off-by: Sam James <sam@gentoo.org>
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@ -81,10 +81,13 @@ src_prepare() {
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sed -e "s|os\.path\.dirname.*$|\"${EPREFIX}/usr/share/Tensile/Source\", end='')|" -i __init__.py || die
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# bug 949817: fix v_dot4_i32_i8 syntax for clang-20
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sed 's/ op_sel:\[0,0\] op_sel_hi:\[1,1\]//' -i Components/MAC_I8X4.py || die
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popd || die
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sed -e "/package_data/d" -e "/data_files/d" -i setup.py || die
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use client && PATCHES= cmake_src_prepare # do not apply patches again in cmake_src_prepare
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use client && PATCHES='' cmake_src_prepare # do not apply patches again in cmake_src_prepare
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}
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src_configure() {
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